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FPGA ASIC RTL Design Engineer - Memory Storage - CAN RELO

Irvine, CA
ASIC FPGA Design Engineer needed for well established ground breaking memory storage company in Irvine!! We are looking for exceptional RTL design engineers to work on complex digital IC projects. T...

Posted: 9 days ago

Senior ASIC Design Engineer (Display)

NVIDIA Corporation
Santa Clara, CA
Senior ASIC Design Engineer (Display) We are now looking for a Senior ASIC Design Engineer (Display): What you’ll be doing: - Micro-architect, design, implement next generation display technology...

Posted: 12 days ago

ASIC Power Design Engineer

Cameron Resources Group
Orlando, FL
As you relax and enjoy the beautiful Orlando weather, you sit back and think proudly of yourself for your role in creating the newest Virtual Reality technology. Imagine for a moment how you -- while ...

Posted: 17 days ago

ASIC Physical Designer

Intelliswift Software
Santa Clara, CA
ASIC Physical Designer Multiple Location: •Santa Clara, CA •Hillsboro, OR •Chandler, AZ •Austin TX Executing structural design including Synthesis runs, P&R, APR, Performance Verification involving...

Posted: 12 days ago

FPGA / ASIC Design Engineer

Space Exploration Technologies Corp. (SpaceX)
Redmond, WA
SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologi...

Posted: 28 days ago

MTS ASIC/ Layout Design Engineer

Sunnyvale, CA
Job Description: The goal of AMD CAD is to determine a set of best practices and techniques for designing chips with the highest performance, lowest cost, lowest power usage, etc. A...

Posted: 15 days ago

ASIC Physical Designers

Tech Mahindra Limited
Austin, TX
Must Have – RTL- GDSII delivery using Design Compiler, ICC, PrimeTime, Timing optimization experience, TCL coding – 3-5yrs minimum Nice to have – Conformal, Power Optimization, PERL, DRC cleanup CW...

Posted: 30 days ago

ASIC Design Engineer

ASIC North, Inc.
Raleigh, NC
Key Qualifications - The candidate will have a Bachelors degree in EE with 5+ years of work experience or Masters degree in EE with 4+ years work experience: - 5+ years of RTL Logic Design experienc...

Posted: 10 days ago

Wi-Fi ASIC Design Engineer

Darrell WItkowski
San Jose, CA
Job Description: Wi-Fi ASIC Design Engineer Key Responsibilities:Responsible for creating and maintaining SOC bus fabric, including AXI, AHB, APBResponsible for configuration and integration of DDR3 ...

Posted: 15 days ago

Principal FPGA/ASIC Design Engineer

Connetics USA
Irvine, CA
Job Description: PRINCIPAL ASIC/FPGA DESIGN ENGINEER POSITION DESCRIPTION SUMMARY We are looking for exceptional RTL design engineers to work on complex digital IC projects. The engineer will work in...

Posted: 5 days ago

ASIC Design Engineer

Cupertino, CA
Job Description: Remember the days when promising Start-ups existed and were able to compete with the majors players? Fortunately, I have just such a client that is lead by industry Veterans and back...

Posted: 11 days ago

ASIC Engineer – Digital

The Photonics Group
Ventura, CA
Design, simulate, implement and test digital circuits and systems using VHDL/Verilog based RTL design flow (FPGAs/ASICs) and transistor level circuit design practices Design and program digital sy...

Posted: 15 days ago

Asic Verification Engineer

MSR Cosmos It Private Limited
Hillsboro, OR
Hi, Hope you are doing great! My name is BIJON from MSR Cosmos. I wanted to discuss a Below Mentioned contract opportunity we have for our client. Please take a moment to review the included...

Posted: 29 days ago

ASIC Verification Engineer

GCR Professional Services
Boston, MA
JOB DUTIES:- Integration and functional verification for a block of complex IP's for a combined CPU/GPU development effort - Work closely with a team members to understand and verify new design featur...

Posted: 25 days ago

Senior ASIC Verification Engineer - OVM/UVM

Innovative Logic Inc.
San Jose, CA
Looking for Verification Engineer who has recent experience working working on systemverilog using UVM methodology · 5+ years of verification experience at block level or top level · ...

Posted: 1 day ago